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Yasmeen Zayed

Yasmeen Zayed

Electronics EngineeringPrincess Sumaya University for Technology

Amman Amman Governorate, Jordan


Hi, I'm Yasmeen Zayed!

RF & RA Optimization Engineer at Umniah

i'm a recent university graduate with a bachelor's degree in Electronics Engineer from PSUT. I'm a self motivated person who's working hard everyday to achieve my goals and finding my passion in learning new things, gaining new skills and growing as a person whether by taking courses or writing and searching for answers for so many questions i'm curious about.. i live everyday hoping of pursing my passions and dreams.

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    Electronics Engineering

    Electronics Engineering

    Bachelor's·Graduated in 2020·Princess Sumaya University for Technology


    RF & RA Optimization Engineer at Umniah

    June · 2021 - September · 2022

    - Worked in teams on several projects mainly focused on Optimizing the company’s network - Achieved company’s set of goals before deadlines - Completed daily tasks, reports, analysed and organized data, daily trouble shooting and fixing problems, mon...See more

    Electrical Engineer Intern at Royal Scientific Society

    June · 2018 - August · 2018

    - worked as an Electrical Engineering Intern at the Royal Scientific Society . - used measurement tools and instruments (such as thermometer to measure it accuracy and error percentage and compare the device's measurement to the reference device ) -...See more


    Design and Simulation of a Hardware Logic Encryption Block for Sequential Circuits


    Worked on a hardware based encryption block as my Graduation Project. - Designed and simulated on Synopsys Custom Designer based on 28/32nm CMOS technology design rules. - Added the block between the components of an existing architecture with minimal additional cost. The keys were based on a symmetric encryption method. - Resulted in a two blocks design; encryption and decryption, both smaller than 500µm2 and can receive and produce serial data at up to 1Gb/s according to pseudo-LVDS standards. - Achieved less than 18mW power consumption for either block. Each block required two clocks with the same frequency but different skew.





    Electric VLSI Design System

    RF Design


    MIPS Assembly


    AutoCAD Architecture

    Embedded Systems Engineer


    Lead Management

    Power management

    Leadership Development

    Leadership Transition

    Verilog - Logic Operations and Variables

    Verilog Logic Synthesis


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