Yasmeen Zayed
Ingeniería Electrónica en Princess Sumaya University for Technology
Jordania
¡Hola, soy Yasmeen Zayed!
RF & RA Optimization Engineer en Umniah
i'm a recent university graduate with a bachelor's degree in Electronics Engineer from PSUT. I'm a self motivated person who's working hard everyday to achieve my goals and finding my passion in learning new things, gaining new skills and growing as a person whether by taking courses or writing and searching for answers for so many questions i'm curious about.. i live everyday hoping of pursing my passions and dreams.
Experiencia
RF & RA Optimization Engineer
June 2021 - September 2022
- Worked in teams on several projects mainly focused on Optimizing the company’s network
- Achieved company’s set of goals before deadlines
- Completed daily tasks, reports, analysed and organized data, daily trouble shooting and fixing problems, monitoring KPIs
Royal Scientific Society
Electrical Engineer Intern
June 2018 - August 2018
- worked as an Electrical Engineering Intern at the Royal Scientific Society .
- used measurement tools and instruments (such as thermometer to measure it accuracy and error percentage and compare the device's measurement to the reference device )
- worked in teams and was able to maintain communicative environment.
Educación
Ingeniería Electrónica
Princess Sumaya University for Technology
Graduado en 2020
Certificaciones y Distintivos
No se agregó certificaciones o distintivos
Proyectos
Worked on a hardware based encryption block as my Graduation Project.
- Designed and simulated on Synopsys Custom Designer based on 28/32nm CMOS technology design rules.
- Added the block between the components of an existing architecture with minimal additional cost. The keys were based on a symmetric encryption method.
- Resulted in a two blocks design; encryption and decryption, both smaller than 500µm2 and can receive and produce serial data at up to 1Gb/s according to pseudo-LVDS standards.
- Achieved less than 18mW power consumption for either block. Each block required two clocks with the same frequency but different skew.
Idiomas
Árabe
Inglés
Habilidades
Lead Management
Leadership Development
AutoCAD Architecture
MATLAB
Leadership Transition
LTspice
Embedded Systems Engineer
Proteus
Electric VLSI Design System
Verilog Logic Synthesis
Verilog - Logic Operations and Variables
MIPS Assembly
RF Design
Power management
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